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Far from being the passive containers for semiconductor devices of the past, the packages in today's high performance computers pose numerous challenges in interconnecting, powering, cooling and protecting devices. While semiconductor circuit performance measured in picoseconds continues to improve, computer performance is expected to be in nanoseconds for the rest of this century -a factor of 1000 difference between on-chip and off-chip performance which is attributable to losses associated with the package. Thus the package, which interconnects all the chips to form a particular function such as a central processor, is likely to set the limits on how far computers can evolve. Multichip packaging, which can relax these limits and also improve the reliability and cost at the systems level, is expected to be the basis of all advanced computers in the future. In addition, since this technology allows chips to be spaced more closely, in less space and with less weight, it has the added advantage of being useful in portable consumer electronics as well as in medical, aerospace, automotive and telecommunications products. The multichip technologies with which these applications can be addressed are many. They range from ceramics to polymer-metal thin films to printed wiring boards for interconnections; flip chip, TAB or wire bond for chip-to-substrate connections; and air or water cooling for the removal of heat.
The platform-centric SoC method is aimed at the design of today's SoC systems with emphasis on real-time, embedded systems. The approach provides a guideline and an SoC design environment that promotes an integration of state-of-the-art tools and techniques necessary for the development of the systems. It renders a new and better perspective towards co-design approaches, while also raising a level of design abstraction. Because the configurable platform objects are designed off-cycle, they contribute to a general improvement in development time. By incorporating their usage, the overall method strikes a balance between total design flexibility and minimal time-to-market.
In Chapter 1, challenges in the co-design of SoCs are introduced. The chapter briefly describes the technical challenges facing system developers and introduces a proposed solution to the problem. The remainder of this book presents a more thorough examination on the problem and the proposed approach.
Chapter 2 describes the proposed platform-centric SoC design method in detail. It illustrates the design flow and discusses each main step in the design process. Definition of a platform as originally defined by Sabbagh 96], as well as the platform-based and platform-centric design approaches, are presented. The chapter concludes by comparing the proposed approach with previous related work.
Chapter 3 lays out the technological background for the proposed SoC design method. Whereas the platform technology is discussed in Chapter 2, this chapter gives an overview of the other two fundamental technologies: the Unified Modeling Language (UML) and the Extensible Markup Language (XML). The chapter begins with an introduction to UML as a modeling tool very well perceived within the software engineering community. It is followed by a discussion on an attempt by the Object Management Group (OMG) to empower UML for the development of real-time embedded software - an effort which will eventually culminate in a design framework known as the UML Profile for Schedulability, Performance, and Time Specification 29]. Thereafter, an overview of XML and a few other related internet technologies ensue.
Chapter 4 outlines the structure of the library of platform objects (LPO), as well as furnishes a comprehensive guideline and requirements specification that a platform object must possess in order to be scalable and compatible with the proposed approach. Essential elements for each platform object, e.g. architecture blueprint, XML-based self-described modules, platform managing tool, etc., are also discussed in detail.
Chapter 5 provides a detailed treatment of UML extensions for the development of real-time embedded systems. The chapter starts with a layout of the Co-design Modeling Framework (CMF) hierarchy that encompasses five other sub-profiles - the generic utility profile (PCUprofile), the Exception Modeling profile (EMprofile), the Interrupt Modeling profile (IMprofile), the Synthesizable Hardware Description Language profile (SHDLprofile), and the Architecture Blueprint profile (ABprofile). Each of these profiles furnishes a design framework that is specifically tailored for the proposed approach, and may be able to meet with the challenges posed by the design and test of real-time embedded SoC-based systems. The chapter, then, proceeds to discuss the domain concept for each sub-profile, followed by the description of the corresponding stereotypes.
Chapter 6 applies the platform-centric SoC design method, using the CMF profile in UML, to the development of a simplified digital camera system so as to demonstrate the use and the robustness of the proposed approach. Specifically, the NiOS development board is used to mimic the digital camera system where raw image data are read from a charge-coupled device (CCD), and then JPEG encoded and stored into memory. The chapter begins with an overview of the Altera's NiOS system, followed by the actual system development process that explicitly demonstrates the use of the proposed approach. A quantitative evaluation is then presented that compares the development cost of the proposed platform-centric SoC design method against some alternative approaches using cost estimation models and tools.
Chapter 7 concludes the book with a summary and a discussion of future directions for this effort on platform-based design.
The chips in present-day cell phones already contain billions of sub-100-nanometer transistors. By 2020, however, we will see systems-on-chips with trillions of 10-nanometer transistors. But this will be the end of the miniaturization, because yet smaller transistors, containing just a few control atoms, are subject to statisticalfluctuations and thus no longer useful. We also need to worry about a potential energy crisis, because in less than five years from now, with current chip technology, the internet alone would consume the total global electrical power!
This book presents a new, sustainable roadmap towards ultra-low-energy (femto-Joule), high-performance electronics. The focus is on the energy-efficiency of the various chip functions: sensing, processing, and communication, in a top-down spirit involving new architectures such as silicon brains, ultra-low-voltage circuits, energy harvesting, and 3D silicon technologies. Recognized world leaders from industry and from the research community share their views of this nanoelectronics future. They discuss, among other things, ubiquitous communication based on mobile companions, health and care supported by autonomous implants and by personal carebots, safe and efficient mobility assisted by co-pilots equipped with intelligent micro-electromechanical systems, and internet-based education for a billionpeople from kindergarden to retirement. This book should help and interest all those who will have to make decisions associated with future electronics: students, graduates, educators, and researchers, as well as managers, investors, and policy makers.
This book presents a new, sustainable roadmap towards ultra-low-energy (femto-Joule), high-performance electronics. The focus is on the energy-efficiency of the various chip functions: sensing, processing, and communication, in a top-down spirit involving new architectures such as silicon brains, ultra-low-voltage circuits, energy harvesting, and 3D silicon technologies. Recognized world leaders from industry and from the research community share their views of this nanoelectronics future. They discuss, among other things, ubiquitous communication based on mobile companions, health and care supported by autonomous implants and by personal carebots, safe and efficient mobility assisted by co-pilots equipped with intelligent micro-electromechanical systems, and internet-based education for a billionpeople from kindergarden to retirement. This book should help and interest all those who will have to make decisions associated with future electronics: students, graduates, educators, and researchers, as well as managers, investors, and policy makers."
Conceptual Design of Multichip Modules and Systems treats activities which take place at the conceptual and specification level of the design of complex multichip systems. These activities include the formalization of design knowledge (information modeling), tradeoff analysis, partitioning, and decision process capture. All of these functions occur prior to the traditional CAD activities of synthesis and physical design. Inherent in the design of electronic modules are tradeoffs which must be understood before feasible technology, material, process, and partitioning choices can be selected. The lack of a complete set of technology information is an especially serious problem in the packaging and interconnect field since the number of technologies, process, and materials is substantial and selecting optimums is arduous and non-trivial if one truly wants a balance in cost and performance. Numerous tradeoff and design decisions have to be made intelligently and quickly at the beginning of the design cycle before physical design work begins. These critical decisions, made within the first 10% of the total design cycle, ultimately define up to 80% of the final product cost. Conceptual Design of Multichip Modules and Systems lays the groundwork for concurrent estimation level analysis including size, routing, electrical performance, thermal performance, cost, reliability, manufacturability, and testing. It will be useful both as a reference for system designers and as a text for those wishing to gain a perspective on the nature of packaging and interconnect design, concurrent engineering, computer-aided design, and system synthesis.
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